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I2S

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I2S Protocol

Overview

I2S (Inter-IC Sound) is a synchronous serial bus interface standard designed for connecting digital audio devices. It carries stereo PCM audio data between integrated circuits and is used in audio codecs, DACs, ADCs, and DSPs.

1. Theory & Fundamentals

  • Solves digital audio interconnection between audio ICs
  • 3 signal lines: SCK (bit clock), WS (word select/LRCK), SD (serial data)
  • Master provides SCK and WS; slave provides or receives SD
  • Data rate: SCK = 2 × samplerate × bitdepth (e.g., 3.072 MHz for 48kHz 32-bit)
  • WS = 0 for Left channel, WS = 1 for Right channel
  • Voltage: 3.3V CMOS typically

2. Frame / Packet Structure

WS:  ──────┐          ┌──────────
           └──────────┘
SCK: ─┐┌─┐┌─┐┌─┐┌─┐┌─┐┌─┐┌─┐┌─
      └┘ └┘ └┘ └┘ └┘ └┘ └┘ └┘
SD:  ─── MSB ──── ... ──── LSB ───
  • WS transition marks start of new sample word
  • Data shifts MSB first; delay of 1 SCK from WS edge (I2S Philips standard)
  • Justified variants: Left-justified (no delay), Right-justified (LSB aligned)

3. Protocol Mechanics

  • Synchronous — clock provided by master
  • No addressing — point-to-point or bus with single master
  • TDM (Time Division Multiplexing) extension supports multiple channels
  • No error detection built-in
  • PCM data format — 16/24/32-bit signed integer per sample

4. Hardware Implementation

  • MCU I2S peripheral or bit-banged using timers + GPIO
  • Common audio codec ICs: TLV320AIC3204, WM8960, CS43L22
  • Anti-aliasing capacitors on analog input to ADC
  • I2S can be driven by SAI (Serial Audio Interface) on STM32
  • Keep I2S traces short and matched length for high quality audio

5. Register-Level / Configuration

// STM32 I2S2 configuration (16-bit, 44.1kHz, Philips standard)
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
SPI2->I2SCFGR = SPI_I2SCFGR_I2SMOD   // I2S mode
              | SPI_I2SCFGR_I2SCFG_1  // Master transmit
              | (0 << 1);              // 16-bit data, 16-bit frame
SPI2->I2SPR = 2 | SPI_I2SPR_MCKOE;    // Clock prescaler
SPI2->I2SCFGR |= SPI_I2SCFGR_I2SE;   // Enable I2S

// Transmit stereo sample
void I2S_SendSample(int16_t left, int16_t right) {
    while (!(SPI2->SR & SPI_SR_TXE));
    SPI2->DR = left;
    while (!(SPI2->SR & SPI_SR_TXE));
    SPI2->DR = right;
}

6. Driver / Software Development

// DMA-based I2S for continuous audio streaming
uint16_t audio_buf[512]; // Double buffer: 256 left + 256 right interleaved

void I2S_DMA_Start(void) {
    DMA1_Channel5->CPAR  = (uint32_t)&SPI2->DR;
    DMA1_Channel5->CMAR  = (uint32_t)audio_buf;
    DMA1_Channel5->CNDTR = 512;
    DMA1_Channel5->CCR   = DMA_CCR_CIRC | DMA_CCR_MINC | DMA_CCR_DIR
                         | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_EN;
    SPI2->CR2 |= SPI_CR2_TXDMAEN;
}
// Fill audio_buf in DMA half-complete and complete callbacks

7. Debugging & Testing

  • Use logic analyzer with I2S decode to verify WS, SCK alignment
  • Check sample rate matches expected: measure WS frequency
  • Common bugs: wrong clock divider → pitch shift; wrong frame length → mono output
  • Verify MSB alignment (Philips vs Left/Right justified)
  • Oscilloscope: check SCK has clean edges at target frequency

8. Real-World Applications

  1. Audio DAC (CS43L22): Stream PCM audio from STM32 Discovery board
  2. MEMS Microphone (SPH0645): Capture audio with I2S PDM microphone
  3. DSP processing: Real-time FFT on I2S audio stream
  4. Bluetooth speaker: Forward I2S audio to BT codec IC
  5. Audio recorder: Record I2S data to SD card at 44.1kHz

9. Advanced Topics & Edge Cases

  • PDM to PCM: MEMS mics output PDM; use CIC filter or hardware PDM interface
  • Multi-channel TDM: extend I2S to 8+ channels for surround sound
  • Audio synchronization: use PLL to lock I2S to external word clock
  • Codec configuration: I2C used to configure codec registers, I2S carries data
  • Jitter: high I2S clock jitter causes audible noise — use clean PLL source

10. Standards & Variants

Standard Description
I2S (Philips) 1 SCK delay from WS edge, most common
Left-Justified No delay, MSB on first SCK after WS
Right-Justified LSB aligned to WS edge
TDM Multiple channels on one SD line
PDM Pulse-density modulation (MEMS mics)

💡 Practical Examples

Example 1: Play tone via I2S DAC

// Generate 440Hz sine wave, output via I2S
const int16_t sine[64] = { /* precomputed sine table */ };
uint8_t phase = 0;
// In DMA callback: audio_buf[i] = sine[phase++ % 64];

Example 2: Record from I2S microphone

// Configure I2S as receiver, store samples in circular buffer
// Then run FFT to detect dominant frequency

Example 3: Codec volume control via I2C

// WM8960 volume register at address 0x02
I2C_WriteReg(0x1A, 0x02, 0x79 | 0x100); // Set volume = 121

🧪 Practice Questions

Beginner

  1. What is the purpose of the WS (Word Select) line in I2S?
  2. How many I2S signal lines are required for stereo audio?
  3. What is the SCK frequency for 44.1kHz, 16-bit stereo I2S?
  4. What does MSB-first mean in I2S data transmission?
  5. What is the difference between I2S master and slave mode?

Intermediate

  1. Calculate the I2S prescaler for 48kHz sampling on a 72MHz STM32.
  2. How does Left-Justified format differ from standard Philips I2S?
  3. Implement a DMA double-buffer audio output system.
  4. How would you record and play back audio simultaneously (full-duplex)?
  5. What causes audio glitches in DMA-based I2S systems?

Advanced

  1. Implement a real-time audio equalizer using I2S + DSP on Cortex-M4.
  2. How would you synchronize I2S clocks between two MCUs?
  3. Add TDM support for 4-channel audio output.
  4. Optimize I2S DMA for minimum latency in audio processing.
  5. Design an I2S bridge from FPGA to MCU.

Hands-on Projects

  1. Audio Player: Read WAV file from SD card, output stereo via I2S DAC.
  2. Voice Recorder: Capture from I2S MEMS mic, store compressed audio on flash.
  3. Real-time Spectrum Analyzer: FFT on I2S microphone data, display on OLED.

Checklist

  • [ ] Explain I2S frame format and WS channel assignment
  • [ ] Calculate SCK frequency for any sample rate and bit depth
  • [ ] Configure I2S peripheral registers on STM32
  • [ ] Stream audio using DMA double-buffer technique
  • [ ] Configure audio codec via I2C + send audio via I2S
  • [ ] Debug I2S with logic analyzer
  • [ ] Read data from PDM/I2S MEMS microphone
  • [ ] Implement TDM for multi-channel audio
  • [ ] Build real-time audio effects (reverb, filter)
  • [ ] Handle I2S clock synchronization between devices
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